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(ebook) Electronics Verilog Digital Design Synthesis .pdf



Original filename: (ebook) Electronics - Verilog Digital Design Synthesis.pdf
Title: Verilog HDL: A Guide to Digital Design and Synthesis
Author: Samir Palnitkar

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Verilog HDL
A guide to Digital Design
and Synthesis
Samir Palnitkar

SunSoft Press
1996

PART 1 BASIC VERILOG TOPICS
1
Overview of Digital Design with Verilog HDL
2
Hierarchical Modeling Concepts
3
Basic Concepts
4
Modules and Ports
5
Gate-Level Modeling
6
Dataflow Modeling
7
Behavioral Modeling
8
Tasks and Functions
9
Useful Modeling Techniques
PART 2 Advance Verilog Topics
10 Timing and Delays
11 Switch- Level Modeling
12 User-Defined Primitives
13 Programming Language Interface
14 Logic Synthesis with Verilog HDL
PART3 APPENDICES
A
Strength Modeling and Advanced Net Definitions
B
List of PLI Rountines
C
List of Keywords, System Tasks, and Compiler Directives
D
Formal Syntax Definition
E
Verilog Tidbits
F
Verilog Examples

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