WT7510.pdf


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WT7510
Rev. 2.31

BLOCK DIAGRAM

WT751201A_WT7510 BLOCK DIAGRAM
VCC

Power On Reset
150uA

VCC Low Voltage

3.6V

POR

Clock
Generator

LVRST

CLK
PWR

CLK PWR

CLK

PWR

RST
38ms
debounce

PDON_N

V33

- UN

CLK

- OV

clr

+

+

V5

clr

2.4ms
delay

PWR
75 ms
delay

- UN

CLK RST

- OV

73us
debounce

+

R

+

S

FPL_N
Q

VCC

- OV

CLK RST

+

VCC

CLK

PGO

PGI

73us
debounce

- UN

+

clr

300ms
delay

1.2V

RECOMMENDED OPERATING CONDITIONS
Parameter
Supply voltage, VCC
Input voltage
Output voltage
Operating temperature
Output sink current

Conditions

Min.
4

PDON_N, V5, V33, PGI
FPL_N
PGO
-40
FPL_N
PGO

Supply voltage rising time

1

Weltrend Semiconductor, Inc.
Page 3

Typ.
12

Max.
15
7
15
7
125
30
10

Unit
V
V
V
V

mA
mA
ms