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ACASyllabus .pdf



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Advance Computer Architecture

10CS74

A d v a n c e C o mp u t e r A r c h i t e c t u r e
Subject Code: 10CS74
Hours/Week : 04
Total Hours : 52

I.A. Marks : 25
Exam Hours: 03
Exam Marks: 100

PART - A
UNIT - 1
FUNDAMENTALS OF COMPUTER DESIGN: Introduction; Classes of computers;
Defining computer architecture; Trends in Technology, power in Integrated Circuits and
cost; Dependability; Measuring, reporting and summarizing Performance; Quantitative
Principles of computer design.
6 hours
UNIT - 2
PIPELINING: Introduction; Pipeline hazards; Implementation of pipeline; What makes
pipelining hard to implement?
6 Hours
UNIT - 3
INSTRUCTION –LEVEL PARALLELISM – 1: ILP: Concepts and challenges; Basic
Compiler Techniques for exposing ILP; Reducing Branch costs with prediction;
Overcoming Data hazards with Dynamic scheduling; Hardware-based speculation.
7 Hours
UNIT - 4
INSTRUCTION –LEVEL PARALLELISM – 2: Exploiting ILP using multiple issue
and static scheduling; Exploiting ILP using dynamic scheduling, multiple issue and
speculation; Advanced Techniques for instruction delivery and Speculation; The Intel
Pentium 4 as example.
7 Hours

Page 1

Advance Computer Architecture

10CS74

PART - B
UNIT - 5
MULTIPROCESSORS AND THREAD –LEVEL PARALLELISM: Introduction;
Symmetric shared-memory architectures; Performance of symmetric shared–memory
multiprocessors; Distributed shared memory and directory-based coherence; Basics of
synchronization; Models of Memory Consistency. 7 Hours
UNIT - 6
REVIEW OF MEMORY HIERARCHY: Introduction; Cache performance; Cache
Optimizations, Virtual memory.
6 Hours
UNIT - 7
MEMORY HIERARCHY DESIGN: Introduction; Advanced optimizations of Cache
performance; Memory technology and optimizations; Protection: Virtual memory and
virtual machines.
6 Hours
UNIT - 8
HARDWARE AND SOFTWARE FOR VLIW AND EPIC: Introduction: Exploiting
Instruction-Level Parallelism Statically; Detecting and Enhancing Loop-Level
Parallelism; Scheduling and Structuring Code for Parallelism; Hardware Support for
Exposing Parallelism: Predicated Instructions; Hardware Support for Compiler
Speculation; The Intel IA-64 Architecture and Itanium Processor; Conclusions. 7 Hours

TEXT BOOK:
1.

Computer Architecture, A Quantitative Approach – John L. Hennessey and
David A. Patterson:, 4th Edition, Elsevier, 2007.

REFERENCE BOOKS:
1.

Advanced Computer Architecture Parallelism, Scalability – Kai Hwang:,
Programability, Tata Mc Grawhill, 2003.

2.

Parallel Computer Architecture, A Hardware / Software Approach – David
E. Culler, Jaswinder Pal Singh, Anoop Gupta:, Morgan Kaufman, 1999.

Page 2

Advance Computer Architecture

10CS74

Table of Contents
Sl.NO
1
2
3
4
5
6
7
8

Contents
Unit-I
Unit-II
Unit-III
Unit-IV
Unit-V
Unit-VI
Unit-VII
Unit-VIII

Page No
4-17
18-33
34-49
50-69
70-89
90-101
102-119
120-156

Page 3


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