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MPUnit3 .pdf


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M I C R OPR OC E S S OR S

1 0 C S4 5

Unit - 3
3.1

8086 Instruction set
Abbreviations used

R8= AL/BL/CL/DL/ AH/BH/CH/DH
R16=AX/BX/CX/DX/ SI/DI/BP/SP

R= R8 / R1 6

SR=CS/DS/ES/SS

AR=SI/DI/BX/BP

d16=16-bit data

d8=8-bit data

a8=8-bit I/O port address
M8=contents of byte memory
M16=contents of word memory

M=M8/M16

Conventions used:

R
MO V

fo r M O V

R, M

and

for PUSH

R16

and

M

PUSH/POP

R16

MO V

M, R

PO P

R16

Page 61

M I C R OPR OC E S S OR S

ROR R/M,

3.1.1

1 / CL

1 0 C S4 5

for ROR R,1 ROR M,1

RO R R, C L RO R M , C L

8086 Instruction set types

Instructions are normally discussed under:

Data Transfer instructions Ex. MOV BX, CX
Arithmetic instructions Ex. ADD BX, CX
Logical group of instructions Ex. AND BX, CX
Stack group Ex. PUSH DX

I/O group Ex. IN AL, 30H

Branch group Ex. JNC LOCN
String instructions Ex. MOVS
Interrupt instructions Ex. INT 21H

Data Transfer group, Arithmetic group, Logical group, Stack group, and I/O group of
instructions explained first. They occupy several chapters in books.
Here, I explain them under:
2-operand instructions Ex. ADD BX, CX
1-operand instructions Ex. PUSH SI
0-operand instructions: Ex. DAA
Branch group, String instructions, and Interrupt instructions are explained later.

Page 62

M I C R OPR OC E S S OR S

1 0 C S4 5

3.2Operand instructions

3.2.1Operand instructions involving R and R/M

MOV/XCHG

Data transfer

ADD/ADC/SUB/SBB

R

AND/OR/XOR/TEST/CMP

R/M

Arithmetic
Logical

11 instructions x 210= 11264 opcodes

MOV instruction already discussed- see Instruction template
In data transfer instructions flags are not affected.
3.2.2 Exchange Instruction

XCHG DX, [BX]

B e fo re

After

DX

1234H

ABCDH

BX

1000H

DS:1000H

ABCDH

1234H

DS:1002H

Page 63

M I C R OPR OC E S S OR S

1 0 C S4 5

3.2.3 Add instruction
Unlike in 8085, result of add/subtract can be in any register or memory location

B e fo re
ADD [BX], DX

After

DX

1234H

BX

1000H

In 3234H, 34H has

DS:1000H

2000H

3234H

three 1’s. So P flag =0

DS:1002H

B e fo re

After

30H

81H

1

0

ADC DH ,[SI]

DH

Add with Carry

Carry flag

SI 2000H
81H

DS:2000H

50H

1000 0001B(Two 1’s)

DS:2001H

60H

New flag values: Ac=0, S=1, Z=0, V=1, P=1

SUB DH, CL

B e fo re

After

DH

30H

0 BH

CL

25H

Subtract (without borrow)

0BH =
Page 64

M I C R OPR OC E S S OR S

1 0 C S4 5

0000 1011B(Three 1’s)
New flag values: Ac=1, S=0, Z=0, V=0, P=0, Cy=0

SBB DH, CL

B e fo re

After

20H

FAH

1

1

DH

Subtract (with borrow)

Cy flag
CL

25H

FA H = 1 1 1 1 1 0 1 0 (Si x 1 ’s )
2’s complement of FAH=0000 0110 = +06 So, FAH = -06
New flag values: Ac=1, S=1, Z=0, V=0, P=1, Cy=1

Discussion about Overflow (V) flag V

2 3 H (+ v e)

4 3 H (+ v e)

+ 46H (+ve)

+ 54H (+ve)

= 69H (+ve)

= 97H (-ve)

V= 0, Cy = 0

V = 1, Cy = 0

Correct answer

Wrong answer

Overflow used with signed numbers only
Carry flag used with unsigned numbers only

83H (-ve)

F2H (-ve)

+ 94H (-ve)

+ F3H (-ve)

Page 65

M I C R OPR OC E S S OR S

1 0 C S4 5

= 17H (+ve)

= E5H (-ve)

V= 1, Cy = 1

V = 0 , Cy = 1

Wrong answer

Correct answer

94H (-ve)

F6H (-ve)

- 83H (-ve)

- 43H (+ve)

= 11H (+ve)

= B3H (-ve)

V= 0, Cy = 0

V = 0, Cy = 0

Correct answer

Correct answer

94H (-ve)

66H (+ve)

- 23H (+ve)

- 83H (-ve)

= 71H (+ve)

= E3H (-ve)

V= 1, Cy = 0

V = 1 , Cy = 1

Wrong answer

Wrong answer

3.2.4 AND instruction

AND BH, CL
Subtract (with borrow)
0FH=0000 1111B

BH
AND
CL

B e fo re

After

56H

06H

1

1

0 FH

06H=0000 0110B

Page 66

M I C R OPR OC E S S OR S

1 0 C S4 5

Use: Selectively reset to 0 some bits of the destination
Bits that are ANDed with 0’s are reset to 0
Bits that are ANDed with 1’s are not changed

3.2.5 OR instruction

OR BH, CL
56H=0101 0110B

B e fo re

After

BH

56H

5 FH

CL

0 FH

OR

0FH=0000 1111B
5FH=0101 1111B

Use: Selectively set to 1 some bits of the destination
Bits that are ORed with 1’s are set to 1
Bits that are ORed with 0’s are not changed

3.2.6 Ex-OR instruction
XOR BH, CL
56H=0101 0110B
0FH=0000 1111B

B e fo re

After

56H

59H

BH
XOR
CL

0FH

59H=0101 1001B
Use: Selectively complement some bits of the destination.
Bits that are XORed with 1’s are complemented
Bits that are XORed with 0’s are not changed

Page 67

M I C R OPR OC E S S OR S

1 0 C S4 5

3.2.7 TEST instruction
B e fo re
TEST BH, CL

BH

56H=0101 0110B

AND

0FH=0000 1111B

After

56H

56H

CL

0FH

0FH

Temp

45H

06H

06H=0000 0110B
Only flages are affected

TEST basically performs AND operation. Result of AND is not stored
in destination. It is stored in Temp register. Temp is not accessible to
programmer. There is no instruction like MOV Temp, 67H
3.2.8 Compare Instruction

CMP BH, CL

B e fo re

After

BH

56H

56H

CL

0FH

Temp

45H

56H=0101 0110B
0FH=0000 1111B
Only flags are affected
47H

CMP basically performs Subtract operation. Result of CMP is not
stored in destination. It is stored in Temp register. Temp is not
accessible to programmer.

Page 68

M I C R OPR OC E S S OR S

1 0 C S4 5

3.3 Operand Instructions involving immediate data

MOV
ADD/ADC/SUB/SBB

R/M, d8/d16

AND/OR/XOR/TEST/CMP
8 byte registers + 8 word registers+ 24 byte
memory + 24 word memory = 64 opcodes
10 instructions x 64 = 640 opcodes
3.3.1 Move Immediate data to a Register/ Memory location

MOV DX, ABCDH

DX

MOV BH, 12H

BH

B e fo re

After

1234H

ABCDH

B e fo re

After

56H

12H

3.3.2 Add Immediate data to a Register/ Memory location

B e fo re
ADD [BX], 12H

BX

1000H

DS:1000H

20H

After

32H

DS:1001H

Page 69


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