BCH 4197 4186 Imp.pdf


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FPGA IMPLEMENTATION OF A BCH ENCODER-DECODER PAIR
FOR APPLICATION IN FLASH MEMORIES

PROJECT REPORT

Submitted by
Nagaraj J Bhat
09EC55

Suhas Rohit Pai

Vinodhpatil H

09EC91

Yashwant Marathe

09EC106

09EC108

Under the guidance of

Dr U Sripati
Associate Professor

IN PARTIAL FULFILMENT OF THE REQUIREMENTS FOR THE AWARD OF THE DEGREE OF

BACHELOR OF TECHNOLOGY
IN
ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
NATIONAL INSTITUTE OF TECHNOLOGY KARNATAKA, SURATHKAL
SRINIVASNAGAR – 575025 KARNATAKA, INDIA
APRIL 2013