# PDF Archive

Easily share your PDF documents with your contacts, on the Web and Social Networks.

## DEVRY ECET 340 Week 6 HomeWork 6 .pdf

Original filename: DEVRY ECET 340 Week 6 HomeWork 6.pdf
Author: Minu

This PDF 1.5 document has been generated by MicrosoftÂ® Office Word 2007, and has been sent on pdf-archive.com on 10/03/2017 at 06:58, from IP address 43.224.x.x. The current document download page has been viewed 80 times.
File size: 282 KB (2 pages).
Privacy: public file

### Document preview

ECET 340 Week 6 HomeWork 6

Check this A+ tutorial guideline at
http://www.assignmentcloud.com/ecet-340devry/ecet-340-week-6-homework-6
1. What are the four main functions of the HC12 Timer unit?
2. Two input capture events occur at counts 0x1037 and 0xFF20 of the free-running
counter. How many counts (in decimal) have transpired between these two events?
3. What is the maximum time possible before the free-running counter overflows when the
e MHz?
4. Two input capture events occur at 0x1037 and 0x002A. If the prescaler bits PR[2:1:0]
are set to 101 and the e clock is 24 MHz, how much time as transpired between the two
events?
5. Calculate the count that should appear in the timer capture register TC0 if a 125 kHz
rectangular wave is inputted on timer pin PT0 while TCTL4 is preset for falling edge
detection. Assume a 24 MHz e-clock, TMSK2 was programmed with the value \$02, and the
count of the 1st edge event has already been subtracted off from TC0.
6. Write down the name of the HC12 timer register that should be polled through software
to determine whether or not an active input edge has been captured on one of the port T
pins.
7. What is the duty cycle of a signal produced by the PWM when and ?
a. 28.0% b. 29.8% c. 50.0% d. 72.0%
8. What values are required for period and duty cycle to generate a 6.0 kHz, 95% duty
cycle waveform using the PWM function? Assume e-clock frequency is 24 MHz.

9. What is the slowest clock signal that can be generated from the PWM output using the
16-bit counter mode with pre-scaling and scaling? Assume e-clock frequency is 24 MHz.
10. Write down the C statements needed to program PWM channel 0 to output a 12.5 kHz
left-aligned wave with 30% duty cycle. Assume e-clock frequency is 24 MHz.

For more classes visit

http://www.assignmentcloud.com