We show that the performance of pentacene transistors can be significantly improved by
maximizing the interfacial area at single walled carbon nanotube (SWCNT)/pentacene.
Welcome to PDF Archive! We and our partners use different technologies, such as cookies, to personalize content and advertising, and to analyze traffic to our site.
Please click on the button below to give your consent. You can change your mind and change your choices at any time via the Configure cookies link,
located in the footer of all pages of our site.